NEW THIS YEAR – All Technical Program Registrants will be entitled to attend Tutorials at no extra charge!
MONDAY, SEPTEMBER 15, 2014
Title: Automatic Testing from A to Z
Instructor: Mike Ellis; Retired. Previously Northrop Grumman Corp., Test Automation, ATE Associates, Harris Corp
Description: This Tutorial provides a complete overview of the world of ATE from a practical engineering and management viewpoint. Beginning by examining the ATE interfaces and their limitations, it offers managers and project engineers a quick and purposeful insight into the probable sources and causes of potential technical and management problems. Working from the interfaces, the Tutorial explores analog and digital test methods, examines the impact of new instrument technologies and covers the basics of switching systems and pin electronics. The Tutorial will explore the elements of ATE SW, examining the role of each and the scaled limitations that they impose at the TPS level. ATE languages will also be discussed and the different language types analyzed to determine their effect on ATE and TPS performance Software now makes up over 50% of almost all military systems so no discussion of Automated Testing would be complete without exploring the need to consider SW testing as an integral part of the ATS environment. The Tutorial will discuss the impact of the growth in SW, look at some catastrophic example of what happens when we inadequately test software and discuss test requirements and methods. The Tutorial will conclude with a discussion of recent changes in DoD acquisition strategies and their potential impact on the future of ATE. Interoperability, net-centric operations, nanotechnology and smart sensors are high on OSD’s wish-list for new systems and will become an inherent part of the test and maintenance process. Explore DoD’s vision of the next generation of systems, where Test & Evaluation, Condition Based Maintenance, Training and Battle Damage Assessment become by-products of a distributed hierarchical, real-time information network. The future may be closer than you think!
Title: "Design for Built-In Test and Diagnostics"
Instructors: Louis Y. Ungar, A.T.E. Solutions, Inc. & Dr. John W. Sheppard, Montana State University
Description: This tutorial combines materials from two previous tutorials taught at AUTOTESTCON for many years. It provides attendees with a comprehensive overview of the Built-In-Test and Diagnostics challenges and solutions. With increased circuit and system complexity in recent years almost every test approach has had to settle for lower fault coverage, more difficulty in diagnoses and all at greater costs. The notable exception is Built-In Test (or Built-in Self Test, BIST) or as it is often called, embedded test. BIST is a phenomenon that capitalizes on greater circuit complexity (intelligence), better fault isolation from a hierarchical allocation of tests, and does not rely on costly external automatic test equipment (ATE) and test program sets (TPS). The inclusion of boundary-scan circuitry in increasing numbers of today’s chips has made circuit testability more readily available at board and system levels. Inclusion of BIST structures in less, but significant number of chips, has made it possible to invoke chip-level tests even during normal operation. These two developments, already in place for the past several years, and greatly accelerated in the past few years, have not only made component-level, board-level and system-level BIST possible to run after system deployment, but it has also made hierarchical BIST feasible. With hierarchical BIST, diagnostic resolutions can be greatly improved, and self-testing, self-diagnostic, even self-prognostic systems are achievable.
The diagnostics section of this Tutorial provides an overview of traditional and more recent approaches to system-level diagnosis and prognosis. The emphasis is placed on different system modeling approaches and the algorithms that can be applied using resulting models. The Tutorial will review the basic issues and challenges in system diagnosis and prognosis. Fundamental terms and concepts of fault diagnosis will be presented with focus being given to historical approaches and the needs from the perspectives of the Department of Defense. Recent initiatives such as DoD ATS Framework, NxTest, ARGCS, and ATML will also be introduced. Central to this part of the Tutorial will be a continuing discussion of how one handles uncertainty in the diagnostic and prognostic process. It will include recent developments in applying Bayesian techniques and extensions such as hidden Markov models and dynamic Bayesian networks to fault diagnosis and prognosis. Prognosis will be related to the diagnosis problem in the context of “predictive” classification, and Bayesian extensions, will be discussed. Health Management Information Integration will also be addressed and will focus on using formal models, called ontologies, to define the semantics of the required information and then focus on processes for maturing diagnostic applications as maintenance information is collected. Throughout the discussion, the Tutorial will draw upon experiences of the instructors and participants to highlight issues related to diagnostic development within defense and commercial environments. This Tutorial is aimed at professionals in all areas of support, including reliability, maintainability and logistics, as well as engineers and managers from design, test, and quality assurance.
Title: VXI, PXI, IVI, LXI and AXIe Standards Improve ATE Systems Design
PXI is a newer, more compact, faster hardware standard based on CompactPCI. It applies the same extensions to CPCI that VXI did to VME. This modular instrument standard rapidly gained acceptance and can be viewed as a companion standard to VXI, (or by some as a replacement). This 17-year-old hardware standard will be discussed in detail, as will its expected impact on the market. An update will be provided on Enhanced PXI specifications and their implementation, including Low Power Chassis. PXI Express and PXI MultiComputing will be explained with a review of PXI express products and their potential applications.
The Interchangeable Virtual Instrument (IVI) software standard, which has been extensively revised and expanded, will be covered with the latest information available. The IVI Foundation was founded in 1998 and incorporated in 2001. The purpose of the IVI Foundation is promoting specifications for programming test instruments that simplify interchangeability, provide better performance, and reduce the cost of program development and maintenance. IVI Instrument drivers have been available for about 12 years. New Specifications for Digital Test, Counter/Timer, and Signal Oriented test plus LXI triggering and sync will also be discussed.
The LXI Consortium is 9 years old now, and was formed to standardize the way instruments can be connected and controlled via the Internet in a Local Area Network. Extensions for discovery, triggering and synchronization, browser interface, initialization, and programming are all part of the extensions being considered in this standardization effort. We will introduce the latest release of the LXI Specification as well as the introduction of new LXI compliant products that are now available.
An emerging test and measurement standard called AXIe, AdvancedTCA eXtensions for Instrumentation (http://www.axiestandard.org/), is expected to find wide acceptance within the Automatic Test Equipment community as it offers many key benefits. It is expected that a large number of COTS (commercial off-the-shelf) signal conditioning, acquisition and processing modules will become available from a range of different suppliers. AXIe uses AdvancedTCA® as its base standard, but then leverages test and measurement industry standards such as PXI (http://www.pxisa.org/), IVI (http://www.ivifoundation.org/), and LXI (http://www.lxistandard.org/), which were designed to facilitate cooperation and plug-and-play interoperability between COTS instrument suppliers. This enables AXIe systems to easily integrate with other test and measurement equipment. AXIe's large board footprint, available power and efficient cooling to the module payload allows high density in a 19" rack space, enabling the development of high-performance instrumentation in a density unmatched by other instrumentation form factors. Channel synchronization between modules is flexible and provided by AXIe's dual triggering structures: a parallel trigger bus, and radially-distributed, time-matched point-to-point trigger lines. Inter-module communication is also provided with a local bus between adjacent modules allowing data transfer rates up to 10 Gbits/s in each direction, for example between front-end digitizer modules and DSP banks. AXIe is a next-generation, open standard that extends AdvancedTCA® for general purpose and semiconductor test. First specifications were released in June 2010, and a 12-bit, 8 channel AXIe digitizer was elected as the 2013 TM Best in Test winner of the category signal analyzer.
THURSDAY, SEPTEMBER 18, 2014